The term addressing modes refers to the way in which the operand of an instruction is specified. Information contained in the instruction code is the value of the operand or the address of the result/operand. Following are the main addressing modes that are used on various platforms and architectures.
- Implied Mode: In this mode the operands are specified implicitly in the definition of the instruction. All register reference instructions that use an accumulator are implied mode instructions.
Example: CMA (Compliment Accumulator)
- Immediate mode: In this mode, the operand is specified in the instruction itself. An immediate mode instruction has an operand field rather than the address field.
Example: ADD 5 (which says Add 5 to contents of accumulator)
- Register mode: In this mode the operand is stored in the register and this register is present in CPU. The instruction has the address of the Register where the operand is stored.
Advantages of this mode:
- Shorter instructions and faster instruction fetch.
- Faster memory access to the operand(s)
Disadvantages of this mode:
- Very limited address space
- Using multiple registers helps performance but it complicates the instructions.
Example: MOV AX,CX (move the contents of CX register to AX register)
- Register Indirect mode: In this mode, the instruction specifies the register whose contents give us the address of operand which is in memory. Thus, the register contains the address of operand rather than the operand itself. The operand’s offset is placed in any one of the registers BX,BP,SI,DI as specified in the instruction.
MOV AX, [BX](move the contents of memory location s addressed by the register BX to the register AX)
- Auto-increment mode: Effective address of the operand is the contents of a register specified in the instruction. After accessing the operand, the contents of this register are automatically incremented to point to the next consecutive memory location.(R1)+.Example:
Add R1, (R2)+ // OR
R1 = R1 +M[R2] R2 = R2 + d
Useful for stepping through arrays in a loop. R2 – start of array d – size of an element
- Auto-decrement mode: Effective address of the operand is the contents of a register specified in the instruction. Before accessing the operand, the contents of this register are automatically decremented to point to the previous consecutive memory location. –(R1)Example:
Add R1,-(R2) //OR
R2 = R2-d R1 = R1 + M[R2]
Auto decrement mode is same as auto increment mode. Both can also be used to implement a stack as push and pop . Auto increment and Auto decrement modes are useful for implementing “Last-In-First-Out” data structures.
- Direct Mode: The operand’s offset is given in the instruction as an 8 bit or 16 bit displacement element. In this addressing mode the 16 bit effective address of the data is the part of the instruction.
Example:ADD AL, //add the contents of offset address 0301 to AL
- Base addressing: The operand’s offset is sum of an 8 bit or 16 bit displacement and the contents of the base register BX or BP.BX is used as a base register for data segment ,and BP is used as a base register for stack segment.
//suppose the register BX contain 0301.The offset will be 0301+05=0306.Content of the memory location 0306 will move to AL.
- Indexed addressing mode: The operand’s offset is the sum of the content of an index register SI or DI and an 8 bit or 16 bit displacement.
Example:MOV AX, [SI +05]
- Based Indexed Addressing: The operand’s offset is sum of the content of a base register BX or BP and an index register SI or DI.
Example: ADD AX, [BX+SI]
- Based Indexed plus displacement addressing mode: In this mode of addressing the operand’s offset is given by offset=[BX or BP]+[SI or DI]+8 bit or 16 bit displacement.
Example:MOV AX, [BX+SI+05]
Branch Related addressing modes:
- Intrasegment Direct: The effective branch address is sum of 8 or 16 bit displacement and the current contents of IP(Instruction Pointer).It can be used with either conditional or unconditional branching.
- Intrasegment Indirect: The effective branch address is contents of register or memory location that is accessed using any of the data related addressing mode except immediate mode. It can be used only for unconditional branch instruction.
- Intersegment Direct: Replaces the content of IP with part of the instruction and the contents of CS with another part of the instruction. This mode is provide a way of branching from one code segment to another.
- Intersegment Indirect: Replaces the contents of IP and CS with the contents of two consecutive words in memory that are referenced using any one of the data related addressing mode except immediate and register modes.